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Hardware-Beschreibungssprache VHDL • SS 20
V-UE; 2 SWS; ben. Schein; ECTS: 2,5; Fachst.; Dipl.-Ing. Jürgen Frickel Akad. ORat; Kurs mit integrierter Rechnerübung, Anmeldung wegen begrenzter Platzanzahl (30) über StudON, genaue Aufteilung und Zeitplan für V/Ü wird in LV bekanntgegeben, Mi, 10:15-11:…
Status: Offline
Registration Period: No Registration Possible
Maximum participants:30 Free Places: 5
Availability: 1. Feb 2020, 00:00 - 31. Oct 2020, 23:55
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Registration Period: No Registration Possible
Maximum participants:30 Free Places: 5
Availability: 1. Feb 2020, 00:00 - 31. Oct 2020, 23:55
To access this item you need to be logged in and to have appropriate permissions.
Praktikum Digitaler ASIC-Entwurf (Blockpraktikum) • SS 20
PR; 3 SWS; Schein; ECTS: 2,5; Fachst.; Gasthörer; Dipl.-Ing. Jürgen Frickel Akad. ORat; Bitte Voraussetzungen beachten! Blockveranstaltung 14.09.2020-18.09.2020 Mo. - Fr,, 9:00-17:00 , P1+S1 LIKE
Status: Offline
Registration Period: No Registration Possible
Maximum participants:16 Free Places: 4
Period of Event: 14. Sep 2020 - 18. Sep 2020
Availability: 1. Mar 2020, 00:00 - 30. Sep 2020, 23:55
To access this item you need to be logged in and to have appropriate permissions.
Registration Period: No Registration Possible
Maximum participants:16 Free Places: 4
Period of Event: 14. Sep 2020 - 18. Sep 2020
Availability: 1. Mar 2020, 00:00 - 30. Sep 2020, 23:55
To access this item you need to be logged in and to have appropriate permissions.